Pinout & Peripheral Mapping¶

Each IPRO7 GPIO gets its role from the GLB pin multiplexer: fill a GLB_GPIO_Cfg_Type with the pin, a function value (0–27), the mode, pull, drive strength and Schmitt trigger, then call GLB_GPIO_Init(). The tables on this page come from bsp/drivers/ipro7_soc/std_drv/inc/drv_gpio.h, drv_glb.h and the Reef's board configuration header bsp/board/ipro7/ipro7ai_reef_board_config.h; for the board's full wiring and its 40-pin header see IPRO7AI Reef EVK.

/* field order: { pin, function, mode, pull, drive, smt } */
GLB_GPIO_Cfg_Type cfg = { GLB_GPIO_PIN_20, GPIO_FUN_UART, GPIO_MODE_AF, GPIO_PULL_UP, 0, 1 };
GLB_GPIO_Init(&cfg);

GPIO function select¶

UART pins¶

UART uses a two-stage multiplexer, so it can sit on most GPIOs:

1. Set the GPIO to function 7. The pin becomes UART signal N, where N = GPIO number mod 12 (GLB_UART_SIG_0–GLB_UART_SIG_11).
2. Map that signal to TXD, RXD, CTS or RTS of UART0 / UART1 with GLB_UART_Fun_Sel().

Pins whose numbers leave the same remainder modulo 12 share one signal and cannot carry different UART signals at the same time.

The Reef's console is on UART0: GPIO20 (GLB_UART_SIG_8 → TXD) and GPIO21 (GLB_UART_SIG_9 → RXD), wired to pins 3 / 4 of the U6 debug connector and pins 8 / 10 of J_IO. GPIO20 / 21 are also the Boot ROM's UART download pins. The console baud rate comes from the application's CONFIG_PLATFORM_UART_BAUDRATE, 115200 when unset.

GLB_UART_Sig_Swap_Set() can enable a swap separately for the groups GPIO0–7, GPIO8–15 and GPIO16–22; it exchanges uart_sig[0:3] and uart_sig[4:7] within the group. The startup code sets UART_SIG_SWAP_NONE (no swap), which is what the table shows.

GLB_GPIO_Cfg_Type uart_pins[] = {
    { GLB_GPIO_PIN_2, GPIO_FUN_UART, GPIO_MODE_AF, GPIO_PULL_UP, 0, 1 },
    { GLB_GPIO_PIN_3, GPIO_FUN_UART, GPIO_MODE_AF, GPIO_PULL_UP, 0, 1 },
};
GLB_GPIO_Init(&uart_pins[0]);
GLB_GPIO_Init(&uart_pins[1]);

/* GPIO2 -> SIG_2, GPIO3 -> SIG_3 (GPIO number mod 12) */
GLB_UART_Fun_Sel(GLB_UART_SIG_2, GLB_UART_SIG_FUN_UART1_TXD);
GLB_UART_Fun_Sel(GLB_UART_SIG_3, GLB_UART_SIG_FUN_UART1_RXD);

SPI pins¶

SPI0 (function 4) works in groups of four GPIOs, and the role follows the pin number mod 4: 0 = MOSI, 1 = MISO, 2 = SS, 3 = SCLK (with pin_swap_enable = 0). pin_swap_enable = 1 swaps MOSI and MISO; the SDK default (bsp/board/ipro7/peripheral_config.h) is 1.

SPI1 (function 26) is a separate second SPI with the same grouping rule.

The Reef's WS2812 data line is on GPIO24 (mod 4 = 0) and is driven from SPI0 MOSI, which needs pin_swap_enable = 0. For SPI on J_IO see Peripherals on the Reef's expansion header.

GLB_GPIO_Cfg_Type spi_pins[] = {
    { GLB_GPIO_PIN_4, GPIO_FUN_SPI, GPIO_MODE_AF, GPIO_PULL_NONE, 1, 1 }, /* MOSI */
    { GLB_GPIO_PIN_5, GPIO_FUN_SPI, GPIO_MODE_AF, GPIO_PULL_NONE, 1, 1 }, /* MISO */
    { GLB_GPIO_PIN_6, GPIO_FUN_SPI, GPIO_MODE_AF, GPIO_PULL_UP,   1, 1 }, /* SS */
    { GLB_GPIO_PIN_7, GPIO_FUN_SPI, GPIO_MODE_AF, GPIO_PULL_NONE, 1, 1 }, /* SCLK */
};
for (int i = 0; i < 4; i++) {
    GLB_GPIO_Init(&spi_pins[i]);
}

SDIO / SD card pins¶

The SD host (SDH, function 27) always uses GPIO28–33. The same pins also reach the external flash (SF2 / SF3): with CONFIG_DISABLE_SDC_PINMUX defined, GPIO28–33 go to the external flash and the SD card cannot be used. The Reef's microSD slot is wired to these pins; with the IPRO6S FIN card in the slot, the IPRO7AI drives the card over SDIO on the same pins.

On the Reef, card detect is GPIO15 (0 when a card is seated) and GPIO14 switches the slot's supply (with JP3 on GPIO, low = on). CMD and DAT have no external pull-ups; the SDK's board configuration turns on the IPRO7AI's internal pull-ups. Before you switch the slot off with GPIO14, drive GPIO28–33 low or make them inputs.

I2S pins¶

I2S0 (function 3) works in groups of four GPIOs with fixed positions. The third pin is DIO / DO and the fourth is RCLK_O / DI: in full duplex DO is the output and DI the input; in half duplex DIO carries data both ways.

GPIO0–GPIO31 alternate functions¶

Only functions that matter for peripheral design are listed; every GPIO also has GPIO (11), JTAG (14) and DEBUG (15). Rows that are all "—" are left out.

• MOSI* / MISO*: swapped by pin_swap_enable.
• Sn in the UART row is UART signal n (no swap).
• QDEC row: Qn_A / Qn_B are the A / B phases of QDECn, Qn_LED is its LED drive.
• CHn in the ADC row is a GPADC channel; DAC_A / DAC_B are the two GPDAC outputs.
• CH0–CH4 in the PWM rows are the signal names of the GPIO function definitions (drv_gpio.h); the PWM driver (drv_pwm.h) provides CH0–CH3 only, so pins routed to CH4 have no driver.

GPIO0–GPIO7¶

GPIO8–GPIO15¶

GPIO16–GPIO23¶

GPIO24–GPIO31¶

DVP camera pins¶

The Reef's OV5640 camera wiring (SW7 must be on CAM):

The VDDIO1 power domain covers GPIO0–9 and GPIO36–41 (camera, USB and BOOT pins). I2C0 roles follow pin parity: even is SCL, odd is SDA. With SW7 on GPIO these 16 pins go to J_IO instead, and the camera's 2.8 V and 1.5 V regulators are off.

Board default pins¶

IPRO7AI Reef EVK¶

From bsp/board/ipro7/ipro7ai_reef_board_config.h, set at boot. The Reef has no JTAG connector; the camera, audio and analog pins are set by their drivers when enabled.

The default pins of the other boards (IPRO7 EVB, IPRO7AI EVK) are in their board configuration headers in bsp/board/ipro7/; contact INTELPRO for these boards.

Pin conflicts and design notes¶

• GPIO20 / 21: used by the Boot ROM's UART download and by the console; keep them connected to U6.
• GPIO0–7, GPIO22, GPIO34–40: the Reef's camera pins. With SW7 on CAM the camera uses them; with SW7 on GPIO they go to J_IO and the camera is off.
• GPIO10, GPIO11, GPIO27: the Reef's keys SW3, SW5 and SW4 (low when pressed); also brought out to J_IO.
• GPIO12, GPIO13: the Reef's headset-microphone analog inputs (AIN6, AIN7).
• GPIO17–22: carry flash (SF) functions. Whether they are free depends on the package, the flash configuration and the schematic, not on the number alone.
• GPIO23–28: shared with the external flash (SF2). On the Reef, GPIO23 is the GPDAC speaker output, GPIO24 the WS2812, GPIO25 the amplifier enable and GPIO26 the headset-detect input.
• GPIO28–33: SD card or external flash (SF2 / SF3), chosen with CONFIG_DISABLE_SDC_PINMUX; the Reef uses them for the microSD slot.
• GPIO18 / 19: the 32 kHz crystal pins. The Reef has no crystal fitted; these two pins are the I2C on J_IO (4.7 kΩ pull-ups on the board).
• I/O voltage: every IO on the Reef V4.0 is 3.3 V; never connect 5 V signals.
• Schmitt trigger: per pin (the last field of GLB_GPIO_Cfg_Type).

Peripheral connection guide¶

The Reef's 40-pin expansion header J_IO follows the Raspberry Pi's position and pin order. The table lists interfaces that the IPRO7's pin functions allow on J_IO. The SDK has no Reef example configuration for them; set the pin functions as described in the sections above. Interfaces marked SW7 on GPIO use camera pins, and the camera is off while they do.

Pins 1 and 17 of J_IO are 3.3 V outputs; pins 2 and 4 output USB 5 V through a diode and cannot power the board. The full pin table is on IPRO7AI Reef EVK.

I2C sensor¶

The board already has 4.7 kΩ pull-ups; add none. I2C1 (function 25) is a separate second I2C controller.

SPI peripheral (LCD / sensor)¶

Needs SW7 on GPIO and pin_swap_enable = 0; for where MOSI and MISO land, see SPI pins.

I2S audio codec¶

Needs SW7 on GPIO. Connect the codec's control interface to the I2C on J_IO (pins 3 and 5). Each group of four is BCLK, FS, DO, DI in order; see I2S pins.

UART expansion¶

UART1 can sit on most GPIOs; on J_IO use GPIO2 (pin 40, TXD) and GPIO3 (pin 38, RXD) with SW7 on GPIO, configured as in the example under UART pins. GPIO20 / 21 stay reserved for the Boot ROM's UART download and the console.

SD card¶

The Reef's microSD slot always uses GPIO28–33; these pins do not reach J_IO:

PDM microphone¶

PDM microphones are captured through the audio ADC (AUADC); pin roles follow parity: even is PDM_CLK, odd is PDM_DATA. The Reef's on-board PDM microphone MK1 is on CLK GPIO16 and DATA GPIO17; mic rec pdm in ipro7ai_reef_demo records from it.

Antenna¶

Choosing a 2.4 GHz antenna:

Put a π matching network between the RF output and the antenna: a shunt capacitor to ground at the RF side, a series inductor, and another shunt capacitor to ground at the antenna side. The Reef uses the PCB antenna E1 by default; move the 0 Ω resistor from R2 to R1 to use the u.FL connector RF1 instead.

Related documents¶

• IPRO7AI Reef EVK: on-board wiring, J_IO and U6 pin tables.
• IPRO7: peripheral counts and specifications.
• Power & Current Measurement: how the Reef is powered and how to measure current.
• IPRO7 datasheet and hardware design guide (pin definitions, GPIO multiplexing): see Documents.